synth_tools

Back

Pitch, http://www.latticesemi.com/view_document?document_id=213 Analog Devices (http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5542.pdf LFCSP 8pin Pitch 0.5mm, Thermal Pad 3.1x3.1mm; (see Texas Instruments EUS 5 Pin (https://www.jedec.org/sites/default/files/docs/MO-193D.pdf variant BA), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-50DS-0.5V, 50 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV, 4 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator JST PH series connector, 502382-1270 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 16 Pin (JEDEC MS-013AD, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/RW_24.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DD Package; 8-Lead Plastic Dual Flat, No Lead Package (JQ) - 4x4x0.5 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf 44-Lead Plastic Shrink Small Outline (SM) - 5.28 mm Body [HTSSOP], with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=267, NSMD pad definition Appendix A BGA 196 0.5 CPGA196 Artix-7 BGA, 22x22 grid.

New Pull Request

Labels Milestones