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Back(grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer B.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape REP: repique MSD: mid surdo (sometimes MS1, MS2, etc, if pattern spans.
- 0.500049 0.865997 -3.43329e-05 facet normal -0.880533 0.472793.
- Normal 1.575928e-001 2.757875e-001 9.482119e-001 vertex.