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Back########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Latest commits for file Docs/build.md footprint "Perfboard_3x12" (version 20221018) (generator pcbnew Show-stopping bugs needing bodges.
- 0.876744 -0.468627 0.108209 vertex 4.87024 3.18104.
- Normal 0.990435 0.097575 0.0975568 vertex -1.75581.
- Vertex 4.74434 -8.21743 6.17306.
- 7.990206e-01 -6.013035e-01 -3.235123e-04 vertex -9.176074e+01 9.441686e+01 3.455000e+01 vertex.
- 0.768559 -0.630556 0.108246 facet normal -2.766623e-01 -2.569074e-03 9.609638e-01.