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YZP0005 pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf BGA 12 0.5 R-XBGA-N12 Texas Instruments, DSBGA-6, 0.704x1.054mm, NSMD, YKA pad definition, 0.704x1.054mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, https://www.nxp.com/docs/en/package-information/98ASA00869D.pdf#page=1 MAPBGA 14x14x1.18 PKG, 14.0x14.0mm, 289 Ball, 17x17 Layout, 0.5mm Pitch, https://ww1.microchip.com/downloads/en/DeviceDoc/16B_WLCSP_CS_C04-06036c.pdf WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.294x3.258mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on the other - ground plane Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a Updates from real TL0x4s Merge pull request synth_mages/MK_VCO#4 merged pull request synth_mages/MK_VCO#5 613d1b6f7e Merge pull request 'Put title box in PDF export' (#4) from schematic into main Merge pull request 'Finish schematic, add PDF Compare 3 commits from pcb_finalization into main Merge pull request synth_mages/MK_SEQ#2 b77534e3fc Added schmancy pcb for v1 front panel Added schmancy pcb for v1 build Schematics/bad_trace_v1.jpeg Normal file Unescape // Width of module (HP) width = 36; // [1:1:84] working_increment = working_height / 6; // generally-useful spacing amount for vertical columns of stuff col_left = h_margin; working_height = height * rotate_vector_cos, rotate_vector_sin * rail_depth] // top left [left_edge, 0], // drop to axis [left_edge, -extra_depth], // bottom horizontal rib .

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