3
1
Back

Ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes unplated through holes: ============================================================= 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be More SR1 notation Samurai PSU/Synth Mages Power Word Stun Panel.kicad_pcb | 4710 Synth Mages Power Word Stun Panel.kicad_pcb create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/MountingHole_3.2mm_M3.kicad_mod delete mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-Edge_Cuts.gbr create mode 100644 Schematics/SynthMages.pretty/Perfboard_2x12.kicad_mod create mode 100755.

New Pull Request