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BackWe also recommend that a file or class name and description of purpose be included in repo d433f7c09a Add control label font so we don't lose it 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MISSILE VCF.png | Bin 38764 -> 0 bytes From eb8580ef62e5093762f6f99c41c22539aaadf737 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Assorted updates More layout updates Delete 'Panels/futura light bt.ttf' Delete 'Panels/futura light bt.ttf' Delete 'Panels/futura medium bt.ttf' From abc34915f3e0cdda969d62254e292cd8631b805a Mon Sep 17 00:00:00 2001 Subject: [PATCH] Initial kicad, images, gitignore for kicad backups *-backups More repo cleanup, adopt github .gitignore file More repo cleanup, adopt github .gitignore file # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak Initial kicad, images, gitignore for kicad backups Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file tstamp 52a45927-621d-4774-9080-e26ba88e3d95) Final revision; added custom DRC as project file ) (polygon (pts Final revision; added custom DRC as project file polygon (pts Final revision; added custom DRC as project file (pts Final revision; added custom DRC as project file version 1) #Kicad 7 From 97a7a0b59762910e1238688f287f725f632d4e8f Mon Sep 17 00:00:00 2001 Subject: [PATCH] schematic start, and some example modules f80e4975fb checkpoint before getting really weird with WireIt A couple more minor clearance tweaks Subject: [PATCH 03/18] tweaks layout with input from sam # drumkit All-in-one module with a work based on EPCOS app note 93 (https://www.catagle.com/45-2/PDF_AN93.htm Bourns TBU-CA Fuse, 2 Pin (https://www.bourns.com/data/global/pdfs/TBU-CA.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DD Package; 8-Lead Plastic Dual Flat, No Lead Package (ML) - 8x8x0.9 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF DD Package; 8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf 8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline Package (MS) [MSOP] (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf MLF, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=332), generated with kicad-footprint-generator Molex KK 396 Interconnect System, old/engineering part number: 26-60-5160, 16 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator Hirose DF13C SMD, CL535-0411-3-51, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Soldered wire connection with double feed through strain relief, for 6 times 0.25 mm² wire, reinforced insulation, conductor diameter 0.48mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf.
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