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Corner pads and trace routing to de-bodge the pots. Updates the potentiometer pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf 20-Lead Plastic Shrink Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC 2.54 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf DFN, 10 Pin (https://www.ti.com/lit/ds/symlink/bq24090.pdf), generated with kicad-footprint-generator Fuse SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator Samtec HLE .100" Tiger.

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