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BackStackup: T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RA6020F_Single_Slide.kicad_mod Normal file View File # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Images/PXL_20210831_002553634.jpg Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03765.JPG Executable file View File 3D Printing/Tools/Eurorack_Nut_Driver_8mm.stl Executable file View File Datasheets/2N3903-Motorola.pdf Executable file View File 3D Printing/Cases/Eurorack 2-Row/2row_frame.scad Executable file View File Hardware/PCB/precadsr/precadsr.net Normal file Unescape Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_Cu.gbr Normal file View File 398c2b234c Checkpoint after converting most things to SMD Checkpoint after tweaking footprints some more, starting over at 14hp Added hard sync input. CV in.
- $fn=360); vertex 0 10.1904 0 0.
- A3ef080e1b121b539473d6a28338113ee94a7aee Mon Sep 17 00:00:00 2001.
- 0.03414 -0.0621913 0.99748 vertex -3.4113 7.24174 19.9481.