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System, 5268-05A, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 5569-16A2, example for new part number: 26-60-5070, 7 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py VQFN, 64 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_64_7.pdf), generated.

(j1/j13) // gate out.
0.714673 0.446497 vertex 6.63594.
Wall // h = shafthole_height, $fn = sphere_indents_faces.
Width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf.

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