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Wiring 55ee65a5e9 Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces a3181ad06b Add correct footprints to fireball Minor layout tweaks Finish schematic, add PDF Fix for component clearance, panel thickness from printer realities Fix for component clearance, panel thickness from printer Binary files /dev/null and b/Futura Heavy BT.ttf From 0c682bad950fdd2cbbdce033cf243faec76364d8 Mon Sep 17 00:00:00 2001 Subject: [PATCH 15/18] Add jlc constraints DRC; replace order number text Things best left to external modules: - CV-controlled CV offset module - add a voltage to trigger a second sequencer's run, which then re-triggers the first. More feature ideas: Trigger out.

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