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Back5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks merged pull request 'Finish schematic, add PDF' (#2) from schematic into main ... Put title box in PDF export' (#4) from schematic into main ... Put title box in PDF export Merge pull request 'Put title box in PDF export 45cf8c00cd Merge pull request 'Finish schematic, add PDF Fix for two different ranges (e.g. 0-2.5v / 0-5v - Gate out (could normal to Reset In - Pause sequence and resume - a function of the flat make the hole in.
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