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Hardware/PCB/precadsr/ao_tht.pretty/Jack_6.35mm_PJ_629HAN.kicad_mod delete mode 100644 Synth Mages Power Word Stun.kicad_prl Synth Mages Power Word Stun Panel.kicad_prl", Synth Mages Power Word Stun.kicad_prl | 77 Fireball/Fireball_panel.kicad_pro | 504 Fireball/fp-info-cache | 51 .../Jack_6.35mm_PJ_629HAN.kicad_mod | 29 .../ao_tht.pretty/LED_D5.0mm.kicad_mod | 34 .../PCB/precadsr_Gerbers/precadsr-F_Mask.gbr | 481 .../PCB/precadsr_Gerbers/precadsr-F_Paste.gbr | 4 .../precadsr-Edge_Cuts.gbr | 30 .../Panel/precadsr-panel/precadsr-panel.sch | 259 Hardware/Panel/precadsr_panel.png | Bin 10724 -> 0 bytes Binary files /dev/null and b/Panels/luther_triangle_10hp.stl differ Binary files /dev/null and b/Panels/FireballSpell.png differ Binary files a/3D.

Normal -0.292521 0.954699 0.0546087.
Href="https://gitea.circuitlocution.com/synth_mages/precadsr/commit/3d0ca7fdf6e2ad8d7864221e585c668e46544055">3d0ca7fdf6e2ad8d7864221e585c668e46544055 Update README.md * [Schematic](Docs/precadsr.pdf) * PCB layout.
Vertex -9.838217e+01 9.177819e+01 2.550000e+00.
-0.634392 -0.773012 0 vertex.

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