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[PATCH 02/18] Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups From f835c1b52669c83e3b7ee8bb7127766f514de308 Mon Sep 17 00:00:00 2001 Subject: [PATCH] updates led holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 25mm mounting-hole-offset 25mm 15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 25mm, distance of mounting holes 47.1mm, distance of mounting holes 25mm, distance of mounting holes distance 25mm 15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm mounting holes to 5mm + unplated, and revises jack footprint updates led holes to 5mm + unplated, and revises jack footprint a3181ad06b Add correct footprints to fireball Minor layout tweaks Finish schematic, add PDF Schematics/Fireball_VCO.pdf | Bin 37432 -> 0 bytes From bada0399ca1e4fb2dd01b4ec5312596f167b34e1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] To GitLab Hardware/PCB/precadsr/precadsr.kicad_pcb | 3 | 1 C10, C14 is a dealbreaker 7555-based "Fastest Envelope In The West" (bottom one) third iteration of a pot rotary_knob_row = top_row - 30; working_width = width_mm - hole_dist_side, hole_dist_top); cylinder(r=hole_r, h=thickness*2); echo("Putting a hole with radius: ", hole_r , " at ", hole_dist_side, height - v_margin*2 - title_font_size; working_increment = working_height / (8+tolerance/5); // generally-useful spacing amount for vertical columns of stuff working_height = height - hole_dist_top); } module title(string, size=12, halign="center", font=font_for_title) { 88bf85725f Update to 7.0, slider footprint From cf14a1432f34f59aa501c13fe7ffe5fdc817eb3a Mon Sep 17 00:00:00 2001 Subject: [PATCH 01/13] initial notes for v1 build Schematics/bad_trace_v1.jpeg Normal file View File From 744b72ef7e0d94fccfae99ec3cb3514981ac4616 Mon Sep 17 00:00:00 2001 Subject: [PATCH 01/18] Added hard sync to schematic, laid out PCB with exploratory 8hp layout Schematics/Enlarge/Enlarge.kicad_prl | 10 nF | Unpolarized capacitor | | Tayda | A-826 | | | | | | | | S3 | 1 | B20k | Potentiometer | | | C13 | 3 | A1M | Potentiometer | | | C7, C12, C13 | 3 | AudioJack2 | Audio Jack, 2 x 6mm.

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