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Dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf Altera UBGA U324 BGA-324 BGA-624, 25x25 grid, 21x21mm package, pitch 0.35mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.8mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf WLCSP-81, 9x9, 0.4mm Pitch, http://www.st.com/content/ccc/resource/technical/document/technical_note/92/30/3c/a1/4c/bb/43/6f/DM00103228.pdf/files/DM00103228.pdf/jcr:content/translations/en.DM00103228.pdf pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf UFD Package, 4-Lead Plastic QFN (4mm x 4mm) (see Linear Technology 05081955_0_DHC18.pdf DHD Package; 16-Lead Plastic Small outline http://www.ti.com/lit/ml/mpds158c/mpds158c.pdf VSO40: plastic very small outline package; 20 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf HTSSOP, 38 Pin (JEDEC MS-013AB, https://www.analog.com/media/en/package-pcb-resources/package/33254132129439rw_18.pdf), generated with kicad-footprint-generator Tantalum Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator JST XH vertical JST XA series connector, S8B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator Molex PicoBlade series connector, S05B-XASK-1N-BN (http://www.jst-mfg.com/product/pdf/eng/eXA1.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-0810, with PCB trace layout master PSU/Synth Mages Power Word Stun.kicad_sch There are no workflows yet. For more information on Gitea Actions, see the documentation. Condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net != B.Net" (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'graphic')" # This would override board outline and milled areas # (condition "A.Type == 'via' && B.Type == 'graphic')")) # edge clearance condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Type .

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