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-0.307488 0.099312 facet normal 0.952377 -0.288901 0.0975456 facet normal -3.934401e-001 6.745051e-001 6.246981e-001 facet normal 4.720716e-001 -8.093081e-001 3.495267e-001 vertex -3.443231e+000 2.638496e+000 2.480400e+001 facet normal -0.884724 0.268379 0.381099 vertex 2.33215 -9.81063 2.58057 facet normal 0.995114 0.0980109 -0.0119198 facet normal 0.990435 0.097575 0.0975568 vertex -8.82707 -1.75581 3 vertex 8.81921 1.75094 3 facet normal 0.243766 -0.29707 0.923216 vertex -1.72277 8.83032 3.82299 vertex 8.81404 -1.79875 3.82299 facet normal -1.011997e-14 5.429241e-15 -1.000000e+00 d8eca8dc7e Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane 5e32fb4fc0953f2a10f8dc9cf7a0a3653bcbf4f2 @circuitlocution.com created pull request synth_mages/MK_VCO#5 Add jlc constraints DRC; replace order number text 613d1b6f7ef8de710893bbeb40d56c8d26d50247 @circuitlocution.com created pull request 'pcb_finalization' (#1) from bugfix/10hp into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/3 More schematics Merge pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 75 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | C2, C5, C6, C8 | 4 README.md | 12 delete.

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