3
1
Back

46007-1104, 4 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator ipc_gullwing_generator.py MSOP, 10 Pin (http://www.ti.com/lit/ds/symlink/tps7a91.pdf#page=30), generated with kicad-footprint-generator ipc_gullwing_generator.py 16-Lead Plastic Shrink Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf DCB Package 8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf 44-Lead Plastic Thin Shrink Small-Outline Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments DSBGA BGA Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf ST WLCSP-100, off-center ball grid, ST die ID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf UFBGA-169, 13x13 raster, 7x7mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch.

New Pull Request