Labels Milestones
BackDie ID 466, 1.86x2.14mm, 18 Ball, X-staggered 18x10 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, YZR pad definition (http://www.ti.com/lit/ml/mpbg674/mpbg674.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf UCBGA-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-49, 7x7 raster, 2.965x2.965mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 225 0.8 CSGA225 Spartan-7 BGA, 14x14 grid, 8x8mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf TFBGA-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf UFBGA-201, 15x15 raster, 13x13mm package, pitch 0.65mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; http://ww1.microchip.com/downloads/en/devicedoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=208 WLCSP-16, 1.409x1.409mm, 16 Ball, 4x4 Layout, 0.5mm Pitch, https://www.ti.com/lit/ds/symlink/sn74lvc1g17.pdf#page=42, https://www.ti.com/lit/ml/mxbg018l/mxbg018l.pdf BGA 5 0.5 YZP Texas Instruments, DSBGA, 0.822x1.116mm, 5 bump 2x1x2 array, NSMD pad definition Appendix A BGA 1760 1 FF1761 FFG1761 Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=271, ttps://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=281, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=82, NSMD pad definition (http://www.ti.com/lit/ds/symlink/msp430f2234.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments EUS 5 Pin Double Sided Module 16-pin module, column spacing.
- 20mm Non-Polar Electrolytic Capacitor C.
- Normal -0.643667 0.528237 0.553767 facet.
- Wall_thickness); Align panel to PSU PCB (will.
- 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix THT.