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L1/L2" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.SilkS" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: merged pull request 'new_footprints' (#5) from new_footprints into main Merge pull request 'Fix rail clearance issues, make all power main synth_tools/Schematics/SynthMages.pretty/Switch.lib 1741 lines main synth_tools/Schematics/SynthMages.pretty/3.5mm_jack_hole_nonpcb.kicad_mod 24 lines Binary files /dev/null and b/Panels/Font files/futura medium bt.ttf.

Ipc_gullwing_generator.py SSOP-8 3.95x5.21x3.27mm Pitch 1.27mm SSOP, 8 Pin.
MWSA0618S, 7.0x6.6x1.6mm, https://sunlordinc.com/Download.aspx?file=L1VwbG9hZEZpbGVzL1BERl9DYXQvMjAyMjExMTUxNDQ4MDU0NTQucGRm&lan=en Inductor, Sunlord.
Vertex -6.91658 -0.991719 7.89187 facet normal -0.617512 -0.144955.

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