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BackAdditional ignored # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Minor layout tweaks merged pull request 'Finish schematic, add PDF Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | L1 | 1 | Conn_01x10 | Pin socket, 2.54 mm, 1x4 | | | C9 | 1 | AudioJack2_SwitchT | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling) | | | R14 | 1 aoKicad | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-14/SOIC-14"/>