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Feature ideas: Trigger out - CLK out - CLK out - GATE out - GATE out - CLK out - CLK out - CLK out - RESET / CASCADE in RESET / CASCADE out - could be other values, ceramic may work, test debouncing. Maybe enlarge footprint if needed. - Resistor footprint could stand to be even. Odd values are -=1 difference() { union() { shape(fsh, cird+cdp*smt/100, cord, cfn*4, chg); module shape(hsh, ird, ord, fn4, hg) { x0= 0; x1 = hsh > 0 ? Ird : ord; x2 = hsh > 0.

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