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MK_VCO/Fireball/Fireball_panel.kicad_pcb 11852 lines tstamp 189e5c14-d81a-45a9-b8ba-c69582490088) Final revision; added custom DRC as project file.

• JFET-Input Operational Amplifiers, DIP-8/SOIC-8/TSSOP-8/VSSOP-8 Binary files.
• 1812 (4532 Metric), square (rectangular) end terminal.
• 1.567822e-01 -8.579745e-03 -9.875959e-01 vertex -1.077492e+02.
• 1.726210e+000 -6.911484e+000 9.983999e+000 vertex 1.917059e+000 -5.367621e+000 2.496000e+001 vertex.

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