Labels Milestones
Back"Layer B.Mask" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: unplated through holes: ============================================================= 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project initial kicad project .../OttosIrresistableDance.kicad_pcb | 2 Hardware/Panel/precadsr-panel/sym-lib-table | 2 pin Molex header 2.54 mm spacing
- 10.0mm Neosid SD12 style3 Inductor, Radial, Pitch=4.00x5.00mm.
- Diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf C Disc.
- 2.35938 -1.82407 11.0482 facet.