Labels Milestones
Back2066 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 4 .../PCB/precadsr_Gerbers/precadsr-PTH.drl | 207 .../PCB/precadsr_Gerbers/precadsr-job.gbrjob | 128 .../precadsr_aux_Gerbers/precadsr-B_Mask.gbr | 266 .../precadsr_aux_Gerbers/precadsr-B_Paste.gbr | 4 .../PCB/precadsr_Gerbers/precadsr-B_Paste.gbr | 15 .../precadsr_panel_al-F_Mask.gbr | 47 .../precadsr-panel.gbrjob | 126 .../precadsr-panel/precadsr-panel-cache.lib | 106 .../precadsr-panel-rescue.kicad_sym | 228 .../precadsr-panel/precadsr-panel.kicad_pro | 481 .../PCB/precadsr_Gerbers/precadsr-F_Paste.gbr | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr-panel-SilkBottom.gbo | 799 .../precadsr-panel-drl_map.pdf | Bin 0 -> 193665 bytes Images/precadsr-panel.png | Bin 0 -> 297934 bytes From 8a9583e7df3009c52174c16ce501729b9c90d7ac Mon Sep 17 00:00:00 2001 Subject: [PATCH 01/13] initial notes for v1 front panel 24ca7abc85 Added schmancy pcb for v2 front panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4s d8eca8dc7ee0c083143ca1478ae7c1277063e5c9 Add polygon calculation for wing plates 3e868f13c4 Go.
- Simulations/*.raw Simulations/*.txt Copper Layer.
- Connector, S14B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator Molex.
- 0.5mm https://www.nxp.com/docs/en/application-note/AN10343.pdff Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch.
- (no ICs), and a "work based on.