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BackImages/capsocket.png | Bin 0 -> 13962 bytes From bada0399ca1e4fb2dd01b4ec5312596f167b34e1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] traces added but maybe won't keep traces added but maybe won't keep From 52a9fa26f6a6a8c4f7e3fc085f8b6ccdd7541277 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add design rules for jlcpcb 9360e76802 Add design rules for jlcpcb 9360e76802 Add design rules for jlcpcb 4ee6887723 Add some perfboard sections, power headers, teardrops checkpoint before getting really weird with WireIt dd8c61c34f A couple more minor clearance tweaks Add ground fills, fix some clearance issues, make all power traces large Fireball/Fireball.kicad_pro | 8 create mode 100644 Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod create mode 100644 Schematics/SynthMages.pretty/Switch.dcm create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Pot_Hole.kicad_mod delete mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pro create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-F_Cu.gbr create.
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