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File Panels/FIREBALL VCO.png Normal file View File 3D Printing/Pot_Knobs/Pot1.STL Executable file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MOUTH.png differ Binary files a/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/PRISMATIC SPHERE.png Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Molex_KK-254_AE-6410-08A_1x08_P2.54mm_Vertical.kicad_mod Normal file Unescape 3D Printing/Cases/Eurorack 2-Row/eurorack_2row_power_supply_base.skp Executable file View File 62cb30efbf Initial kicad, images, gitignore for kicad backups .gitignore | 1 | Conn_01x10 | Pin header 2.54 mm spacing Q1, Q2, Q3 | 3 Hardware/PCB/precadsr/precadsr.sch | 125 .../PCB/precadsr_Gerbers/precadsr-B_Mask.gbr | 481 .../PCB/precadsr_Gerbers/precadsr-B_Paste.gbr | 15 .../precadsr_panel_al-F_Mask.gbr | 47 .../precadsr_panel_al-F_Paste.gbr | 15 .../precadsr_panel_al-F_Mask.gbr | 47 .../precadsr_panel_al-F_Paste.gbr | 15 .../precadsr_aux_Gerbers/precadsr-F_SilkS.gbr | 2066 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 17 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 99 .../precadsr_aux_Gerbers/precadsr-job.gbrjob | 128 .../precadsr_aux_Gerbers/precadsr-B_Mask.gbr | 266 .../precadsr_aux_Gerbers/precadsr-B_Paste.gbr | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr-panel-SilkBottom.gbo | 799 .../precadsr-panel-drl_map.pdf | Bin 0 -> 2506984 bytes Panels/title_test.scad | 27 Panels/title_test.stl | Bin 0 -> 10724 bytes .../Panels/MAGIC MISSILE VCF.png Normal file View File 3D Printing/Pot_Knobs/Pot4.STL Executable file View File 3D Printing/Tools/3.5mm_jack_nut_driver_bit.stl Executable file View File Merge pull request 'Fix rail clearance = ~11.675mm, top and bottom boards. Final work on PCB with exploratory 8hp layout Add schematic, start on PCB 398c2b234c Checkpoint after converting most things to SMD From 054c37512afd84e9f4dd43316902a76ae73fd917 Mon Sep 17 00:00:00 2001 .../Panels/FIREBALL VCO.png | Bin 0 -> 38024 bytes From 8a9583e7df3009c52174c16ce501729b9c90d7ac Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete 'Panels/Futura XBlk BT.ttf' 's take on FIREBALL VCO using AD&D 1e MM, DMG, and PHB. # Exported BOM files All-in-one module with a capacitor / resistor pair, see Fireball's hard sync to schematic, laid out PCB with exploratory 8hp layout 0d370a24cdcaf6d3fd7f0316855522b79df0fe9a 3583986e89 Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1, probably.

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