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Back*.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes: unplated through holes: ============================================================= 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project .../OttosIrresistableDance.kicad_pcb | 2 f63cfba954 Go to file f45c980890 Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it Add the label font so we don't lose it bd1352a047 Fix annoyance of 2x05 IDC header THT 2x20 1.00mm double row Through hole angled pin header, 1x02, 1.27mm pitch, double rows Through hole angled pin header, 2x37, 2.00mm pitch, 4.2mm pin length, double cols (from Kicad 4.0.7), script generated Surface mounted socket strip SMD 1x06 1.27mm single row Through hole pin header SMD 1x24 1.00mm single row (from Kicad 4.0.7), script generated Through hole angled pin header SMD 1x22 1.27mm single row style1 pin1 left Surface mounted socket strip THT 1x32 2.54mm single row Through hole angled socket strip THT 2x38 2.00mm double row Through hole socket strip THT 2x22 1.27mm double row Through hole angled pin header SMD 1x25 1.00mm single row Through hole angled pin header, 2x30, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated Through hole pin header THT.
- -0.554754 0.0419816 0.830954 vertex.
- Modules main 5a4e89eea6 Add position for resistor between.
- Using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix THT Terminal.