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B.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 15:59:21 2021 ac58a9eaed checkpoint after roughing out middle PCB Move LED resistors light tweaks From 8f3ce8359ba460976b5ffcbe5a92590e33120bbc Mon Sep 17 00:00:00 2001 Subject: [PATCH] traces added but maybe won't keep main synth_tools/Schematics/SynthMages.pretty/Perfboard_4x12.kicad_mod 86 lines From 4ee68877235c53d350cd6d734e74936e7f605c70 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add kicad schematic, some diylc noodling 4d47ea2710 Initial stab at a charge no more than 100k to get 1:1 between schematic and PCB, no warnings Add splits and labels to get below 200bpm - C1 is too small for film; is film needed? - Smaller cap (476nF?) for C1 Ceramic 104s for C10, C14, might be fine, might introduce intermittents - Don't put R8 so close to R26 - D36/R47 too close - Trim 5mm from vertical for both panels, to make fitting inside a case easier. Or 10mm if it can fit; losing the bodge area. Outs: Clock Out - 1K to TP5 - Gate out, with probably +12v gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions.

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