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And normal both GND Glide attenuator (B10k) (join two left pins from below Pots, 2-pin: - Glide, manual (A100k) (two left pins, from below) - Clock rate (B100k) (not sure yet which 2 pins diameter 5.0mm z-position of LED center 1.6mm 2 pins diameter 3.0mm 3 pins Ceramic Resomator/Filter 8.0x3.5mm^2, length*width=8.0x3.5mm^2 package, package length=8.0mm, package width=3.0mm, 3 pins UFQFPN 20-lead, 3 x 3 mm, 0.5 mm pitch, ultra thin SMD package; 3 leads; body: 4.3x6.1x0.43mm, https://www.vishay.com/docs/95570/to-277asmpc.pdf 3-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_8_05-08-1637.pdf Texas Instrument DRT-3 1x0.8mm Pitch 0.7mm http://www.ti.com/lit/ds/symlink/tpd2eusb30.pdf DRT-3 1x0.8mm Pitch 0.7mm Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 467, 3.09x3.15mm, 52 Ball, X-staggered 21x11 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g031y8.pdf ST WLCSP-20, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition Appendix A Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306.

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