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Value="0.25" unit="in"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: merged pull request 'More schematics' (#3) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/3 Merge pull request synth_mages/MK_VCO#5 b554ec2138 Add footprint items for panel holes; separate panel and pcb into different.

• 0.491592 0.830236 facet normal -1.605960e-001 2.740506e-001.
• Vertex -1.076467e+02 9.665134e+01 8.863766e+00 facet normal -8.191618e-001 -2.377738e-003.
• To clk_inh to stop progressing

  Submitted.

• -0.188081 -0.291196 0.937993 facet normal.

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