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Back102 Fireball/Fireball_panel.kicad_prl | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes: merged pull request synth_mages/MK_VCO#5
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- 171.055 130.305 (end 182.6 110 (end 172.136474 110.
- -3.260684e-03 -4.299233e-01 vertex -1.092532e+02 9.695134e+01.
- , diameter=22.4mm, Vishay, TJ4, http://www.vishay.com/docs/34079/tj.pdf.
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