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BackTraces "copper_text_size_h": 1.5, "copper_text_size_v": 1.5, "copper_text_thickness": 0.3, PCB initial layout, no traces Fireball/Fireball.kicad_prl | 4 .../precadsr-Edge_Cuts.gbr | 16 Docs/precadsr_bom.md | 4 | 47k | Resistor | | Tayda | A-1531 or A-557 | synth_tools/Schematics/SynthMages.pretty/Micro SPDT (3 pin).kicad_mod Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_26.png Executable file View File 3D Printing/Pot_Knobs/Pot3.STL Executable file View File Panels/a_color_icon_of_a_flying_fireball.webp Normal file View File main precadsr/Docs/precadsr_bom.md 59 lines Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer F.SilkS" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 ; FORMAT={-:-/ absolute / metric / decimal} Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel.gbrjob Normal file Unescape ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: ============================================================= 5ff3077e8252367b7eceb0b21b0803904b695d42 Fix sr2 blue Fix sr2 blue
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