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EDT Generated from schematic into main ... Add jlc constraints DRC; replace order number text Compare 19 commits » c971d0bd8b Merge pull request synth_mages/MK_SEQ#2 b77534e3fc Added schmancy pcb for v2 front panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground plane spokes can be adjusted in the software to the Y position equal to the front Don't put R8 so close to R26 - D36/R47 too close - Clock Rate - variable resist +6k between U2-8 and U2-9 Reset Sw - when pressed, short +12V and the top knob top_row = height .

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