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From d48d677c9103ec90137a6830434841a576342e9a Mon Sep 17 00:00:00 2001 Subject: [PATCH 01/13] initial notes for v1 build Latest commits for branch new_footprints Final revision; added custom DRC as project file version 1) #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'via'" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type" condition "A.Type == 'track'" condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'" (condition "A.Net != B.Net" condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net == B.Net" (condition "A.Type == 'via'" (condition "A.Type == 'pad' && B.Type == 'track'" (condition "A.Type == 'pad' && (B.Type.

Pads 1-2 bridged with 2.
Normal -0.831538 0.555469 0 vertex 2.85317 0.927051.
10mm Electrolytic Capacitor CP, Axial series, Axial.

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