Y="1.2"/> Update luther's layout Update luther's layout Update luther's layout # Kassutronics Precision ADSR with retriggering and looping modifications * Bourns PTL series, such as: Update README.md 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Update README.md 3d0ca7fdf6e2ad8d7864221e585c668e46544055 Update README.md 5505000471ab249f70d985a8f814bce077fb47b2 Update README.md 3e868f13c4dc33c20ca33a0cc8f51c9d63e1c081 updated C14 footprint, traces, groundplane 82024e96c9b263a83b6caf715e8607e9cf1b7d77 updated README.md 5505000471ab249f70d985a8f814bce077fb47b2 Update README.md * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 v1.0 Add CV in to pause the clock and keeps current gate open whenever the voltage.
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