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Information, please refer to this height controls label depth label_inset_height = thickness-1; module label(string, size=4, halign="center", font=default_label_font) { Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.Paste" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer B.Cu" "Notes": "Layer F.SilkS" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer F.Paste" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer B.Cu" "Notes": "Layer B.Cu" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer B.Cu" "Notes": "Layer B.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Cu" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Mask" "Notes": "Layer B.Mask" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks Finish schematic, add PDF' (#2) from schematic into main created pull request 'More schematics' (#3) from schematic into main 96f746fa2d Final tweaks, version submitted to.

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