3
1
Back

This would override board outline and milled areas # (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'via' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track'" (condition "A.Type == 'track' && B.Type == A.Type && A.Net != B.Net" condition "A.Type == 'via' && B.Type == 'track'" condition "A.Type == 'via' && B.Type == A.Type && A.Net != B.Net" condition "A.Type == 'pad' && !A.isPlated()" condition "A.isPlated() && B.Type == 'track'" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: merged pull request 'Finish schematic.

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