synth_tools

Back

And C4 could use fewer caps that way PSU/psu.diy Executable file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Trimmer_Pot_Hole.kicad_mod Normal file Unescape BeginCmp TimeStamp = /551D94EF; Reference = P2; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D9496; Reference = P2; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D9432; Reference = P3; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp BeginCmp TimeStamp = /551D9432; Reference = P3; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D94EF; Reference = P2; ValeurCmp = Analog; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp BeginCmp TimeStamp = /551D9432; Reference = P4; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp BeginCmp TimeStamp = /551D9432; Reference = P2; ValeurCmp = Analog; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D9414; Reference = P2; ValeurCmp = Digital; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp BeginCmp TimeStamp = /551D9466; Reference = P2; ValeurCmp = Analog; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp Hardware/PCB/precadsr/precadsr.kicad_pcb Normal file Unescape Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Paste.gbr Normal file View File 3D Printing/Tools/jack-wrench.stl Executable file Unescape Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-SilkBottom.gbo Normal file View File 3D Printing/Pot_Knobs/Knob_Factory.scad Executable file View File 3D Printing/Cases/Eurorack 2-Row/eurorack_2row_power_supply_base.stl Executable file View File Synth_Manuals/VALMORIFICATION+Build+and+BOM.pdf Normal file Unescape Schematics/SynthMages.pretty/Perfboard_2x12.kicad_mod Normal file View File 3D Printing/Jigs/eurorack_jig_v2.stl Executable file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/PRISMATIC SPHERE.png Normal file View File # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 2441420 bytes Synth_Manuals/LABOR_MANUAL.pdf | Bin 0 -> 16561 bytes create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-14_W7.62mm_Socket_LongPads.kicad_mod delete mode 160000 Kosmo_panel Subject: [PATCH.

New Pull Request

Labels Milestones