3
1
Back

Updates, additions Various updates, additions Various updates, additions Updated LICD, alter alt-textify to handle weaker (<6v) signals Clock out socket, with option to send CV; could also use a ground plane Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4s From.

New Pull Request