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Circuits (https://www.molex.com/pdm_docs/sd/2005280100_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP, 40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56 JEDEC MO-220 variant VEED-6), generated with kicad-footprint-generator ipc_gullwing_generator.py SSOP48: plastic shrink small outline package; 48 leads; body width 3.9 mm; lead pitch 0.635; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot337-1_po.pdf SSOP16: plastic shrink small outline transistor (see http://www.onsemi.com/pub/Collateral/NST3906F3-D.PDF 3-pin SuperSOT package https://www.fairchildsemi.com/package-drawings/MA/MA03B.pdf 6-pin SuperSOT.

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