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Back-9.020292e+01 9.930476e+01 2.655000e+01 facet normal 0.643667 -0.528237 0.553767 facet normal -1.240490e-15 9.755479e-16 -1.000000e+00 facet normal 0.478901 -0.594398 0.646022 facet normal -0.163052 -0.820224 -0.548312 vertex 0.4 3.34543 18.1498 facet normal 0.286108 0.952732 0.102199 facet normal -0.950499 0.290271 0.110881 facet normal 0.2956 0.346101 0.890413 facet normal -0.0458387 -0.92006 0.389086 facet normal -3.934401e-001 6.745051e-001 6.246981e-001 facet normal 0.000000e+00 -9.486858e-15 1.000000e+00 facet normal 9.043030e-02 -1.731022e-04 -9.959028e-01 vertex -1.061852e+02 9.725134e+01 1.022896e+01 vertex -1.063140e+02 9.695134e+01 1.021731e+01 facet normal -0.0974461 0.989341 0.108206 facet normal -0.50001 0.86602 -8.33839e-06 facet normal 0.938728 0.260333 0.22587 facet normal 0.00743619 0.0992258 -0.995037 vertex -9.29244 -3.68165 0.0465822 facet normal 6.481132e-01 -8.372753e-05 7.615440e-01 facet normal -9.861168e-01 0.000000e+00 -1.660529e-01 vertex -1.084964e+02 9.725134e+01 1.085988e+01 vertex -1.084964e+02 9.665134e+01 1.085988e+01 vertex -1.084229e+02 9.725134e+01 1.058613e+01 facet normal 4.044750e-001 -9.145491e-001 0.000000e+000 vertex 5.146404e+000 -2.430847e+000 2.496000e+001 vertex 3.541821e+000 4.395136e+000 9.983999e+000 vertex 8.646397e+000 -4.992000e+000 0.000000e+000 vertex -1.239765e-001 7.031019e+000 2.496000e+001 vertex 1.384484e+000 -6.987365e+000 9.983999e+000 vertex -6.809373e+000 1.801893e+000 9.983999e+000 vertex 5.645941e+000 5.707424e-001 2.496000e+001 vertex -3.245382e+000 4.591067e+000 1.747200e+001 facet normal 0.223044 0.417286 0.880979 facet normal -0.904824 -0.425785 0 Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.Mask" "Notes": "Layer F.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes unplated through holes: merged pull request 'More schematics' (#3) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/4 Merge pull request 'Finish schematic, add PDF' (#2) from schematic into main.
- Normal -4.565612e-001 -8.896920e-001 0.000000e+000 vertex -5.642653e+000 5.844130e-002.
- MPT-0,5-6-2.54 pitch 2.54mm length 4mm diameter.
- 9.807819e-01 3.526503e-04 vertex -9.937561e+01 1.058129e+02 2.655000e+01 facet.
- 9.695134e+01 5.006728e+00 facet normal -9.052842e-01 2.348598e-04.