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X="1.2" y="5.0"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull.

3.562743e-001 -6.107879e-001 7.071116e-001 vertex 3.494093e+000 -3.958628e+000.
[QSOP] (http://www.allegromicro.com/~/media/Files/Datasheets/ACS726-Datasheet.ashx?la=en Allegro Microsystems SIP-4, 1.27mm.

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