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2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: merged pull request 'More schematics' (#3) from schematic into main ... Add jlc constraints DRC; replace order number text Compare 19 commits » created pull request 'Finish schematic, add PDF Schematics/Fireball_VCO.pdf .

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