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QFP256J CASE 122BX (see ON Semiconductor 505AB.PDF DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 122BX.PDF 32-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf DFN, 6 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/05081703_C_DC6.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 32 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T1655-4)), generated with kicad-footprint-generator ipc_noLead_generator.py Nexperia wafer level chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l562ce.pdf ST WLCSP-90, ST die ID 469, 4.02x4.27mm, 81 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 467, 3.09x3.15mm, 52 Ball, X-staggered 13x8 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100489.PDF WLCSP-25, 5x5 raster, 2.097x2.493mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf WLCSP-100, 10x10 raster, 8x8mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=260, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=297, NSMD pad definition (http://www.ti.com/lit/ml/mxbg270/mxbg270.pdf Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 3x3 (perimeter) array, NSMD pad definition Appendix A Kintex-7 and Zynq-7000 BGA, 15x15 grid, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=80, NSMD pad definition Appendix A BGA 256 1 FT256 FTG256 Spartan-7 BGA, 15x15 grid, 13x13mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf WLCSP-81, 9x9, 0.4mm Pitch, https://www.nxp.com/docs/en/package-information/SOT1963-1.pdf ST LFBGA-354, 16.0x16.0mm, 354 Ball, 19x19 Layout, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf 3x3mm Body, 0.5mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS711-Datasheet.ashx Allegro Microsystems 24-Lead Plastic Shrink Small Outline (SN) - Narrow, 3.90 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf 44-Lead Plastic Quad Flat, No Lead Package - 3x3 mm Body (http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf 8-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC 1.27 16 12 Wide 16-Lead Plastic DFN (3mm x 2mm) 0.40mm pitch DDB Package; 10-Lead Plastic XDFN (1.35mm x 2.2mm) (see https://www.onsemi.com/pdf/datasheet/emi8132-d.pdf Thermally-enhanced SO-8 PowerPAK PQFN Q5A.

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