Labels Milestones
BackCopper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Finish schematic.
- 0.946485 -0.307054 0.0994239 vertex 7.74866 -1.98952 20.
- Circuits (https://www.molex.com/pdm_docs/sd/2005280190_sd.pdf), generated with kicad-footprint-generator.
- 9.268895e+01 4.255000e+01 facet normal 7.942002e-02 4.702208e-03 9.968302e-01.