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Wires to run, so maybe not. It works this way. "pcb_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.25, "via_diameter": 0.8, "via_drill": 0.4, More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review Apply jlcpcb's design rules, small fixes for those Fireball/Fireball.kicad_pro | 4 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 4 From 2476d4512ed88199eab1d31bec7610a192015386 Mon Sep 17 00:00:00 2001 Subject: [PATCH 06/13] add pic 0252301f35 Go to file Notes on needed revisions from revision 1: **Corrected:** Fix silkscreen misalignment for lower three knobs 4efd2875e8 Replaced accidentally dropped Fine tuning hole. 52b504dd7c Delete 'Panels/futura medium condensed bt.ttf' ## Current draw 12 mA +12 V, 10 mA -12 V Add html test version facet normal 0.260571 -0.962887 0.0703606 vertex -3.09288 7.88052 17.8205 facet normal 1.519551e-001 9.883874e-001 -0.000000e+000 vertex 5.417013e+000 1.665509e+000 9.983999e+000 vertex 7.086258e+000 3.645680e-001 9.983999e+000 vertex 1.651013e+000 -5.455036e+000 1.747200e+001 facet normal -5.006067e-001 8.576186e-001 1.178276e-001 facet normal 4.328695e-01 5.487434e-03 9.014399e-01 facet normal 0 0.995057 0.0993035 facet normal -0.0983934 -0.0148295 -0.995037 vertex 9.91705 1.25281 0.0413265 facet normal 0.195093 -0.980785 -1.68839e-05 facet normal 0.77052 -0.637416 0 vertex -0.388301 -10.1521 2.19603 vertex 9.8813 -2.36142 0 vertex -8.65691 5.31736 0 vertex -6.44874 -0.814666 20 vertex 6.25621 -1.7383 20 vertex 5.09939 -6.16411 20 facet normal -0.435833 0.815355.

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