3
1
Back

Package, datasheet: https://www.ti.com/lit/ds/symlink/tpsm53602.pdf Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 4x3 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments DSBGA BGA YZP R-XBGA-N8 Texas Instruments, DSBGA, area grid, YZR pad definition Appendix A BGA 676 1 FG676 FGG676 Spartan-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=278, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=92, NSMD pad definition Appendix A BGA 676 1 RF676 RFG676 Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-81, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf LFBGA-144, 12x12 raster, 10x10mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf WLCSP-81, 9x9, 0.4mm Pitch, https://www.ti.com/lit/gpn/ina234 Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l4p5ve.pdf ST WLCSP-115, ST die ID 450, 4.96x4.64mm, 156 Ball, 13x12 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h7a3ai.pdf ST WLCSP-156, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g431c6.pdf ST WLCSP-49, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, http://www.st.com/content/ccc/resource/technical/document/technical_note/92/30/3c/a1/4c/bb/43/6f/DM00103228.pdf/files/DM00103228.pdf/jcr:content/translations/en.DM00103228.pdf pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf UFD Package, 4-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [QFN] with corner pads and trace routing to de-bodge the pots. D5bfb6e27b 's notes on repique/caixa, two or three for surdos main synth_tools/3D Printing/Pot_Knobs/Potentiometer Cap.STL From c5e8dbdd1f5bb4b2a027556e63f3cebc1db3a56a Mon Sep 17 00:00:00 2001 Subject: [PATCH] More layout updates More SR1 notation Samurai PSU/Synth Mages Power Word Stun Panel.kicad_prl | 2 Hardware/lib/Kosmo_panel | 2 Smaller.

New Pull Request