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-> 69774 bytes Images/precadsr-panel-art.png | Bin 16700 -> 0 bytes Images/precadsr-panel.png | Bin 0 -> 2506984 bytes Panels/title_test.scad | 27 Panels/title_test.stl | Bin 0 -> 113418 bytes create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_centered.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Rotary_Switch.kicad_mod create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pretty/precadsr-panel-art.kicad_mod create mode 100644 Hardware/PCB/precadsr/precadsr.pro delete mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Pot_Hole_NPTH.kicad_mod delete mode 100644 Hardware/PCB/precadsr/precadsr.kicad_pcb create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pro delete mode 100644 (0 F.Cu signal (31 "B.Cu" signal (32 B.Adhes user (33 F.Adhes user hide (0 "F.Cu" signal (31 "B.Cu" signal (32 "B.Adhes" user "B.Adhesive" (33 "F.Adhes" user "F.Adhesive" (34 "B.Paste" user (35 "F.Paste" user (36 B.SilkS user (37 F.SilkS user hide (35 F.Paste user (36 "B.SilkS" user "B.Silkscreen" (37 "F.SilkS" user "F.Silkscreen" (38 "B.Mask" user (39 "F.Mask" user (40 Dwgs.User user (41 Cmts.User user (42 Eco1.User user (43 Eco2.User user (44 Edge.Cuts user (45 Margin user (46 "B.CrtYd" user "B.Courtyard" (47 "F.CrtYd" user "F.Courtyard" attr (teardrop (type padvia (min_thickness 0.0254) (filled_areas_thickness no min_thickness 0.25) (filled_areas_thickness no min_thickness 0.25) (filled_areas_thickness no (end -4.5 6 (end 1.8 -6.85 (end -0.37 -7.65 (end -4.5 6 (end 1.8 1.8 (end -1.8 1.8 (end -0.635 1.27 (end -1.27 0.635 (end -1.27 0.635 (end -1.27 0.635 (end -1.27 -6.35 (end 1.27 -13.97 (end 2.286 1.016 (end -2.286 -1.016 (offset 0.254) hide (end 0 -4.45 (end 4.5 -4.4 (hatch full 0.508 (end 1.25 2.58 (end -1.554775 1.475 (end -1.304775 1.725 (end 3.87 0 (end -0.261252 -0.735 (end -0.261252 0.735 (end 0 10.033 (end 1.27 -6.35 (end 1.27 -6.35 (end 1.27 1.27 (end 1.27 -6.35 (end.

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