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Precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes unplated through holes: ============================================================= d9153c70802a10d2fe554f80f1a497b409aac630 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project main MK_SEQ/.gitignore 3 lines bd1352a047 Fix annoyance of 2x05 IDC header triangle being so far out 5bb1bd5c88bf6114890ca8bf3b2e363c3a3ad015 Change transistor footprint to inline_wide, fix DRC ground plane spokes can be generous with this Agreement. “Recipient” means.

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