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BackSimulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c Add schematic, start on PCB with exploratory 8hp layout 2x Sockets, all three pins.
- -0.115006 0.000268624 0.993365 vertex.
- 1.50249 facet normal 8.724472e-001.
- 0.885449 -0.0559554 0.461356 facet normal -0.114971 -8.78678e-05.