Labels Milestones
Back-0.99264 -7.2327 7.55007 facet normal 0.24742 -0.963803 0.0993384 facet normal -0.392543 -0.734384 0.553705 facet normal 0.24378 0.297045 0.92322 facet normal -9.958892e-001 9.057941e-002 0.000000e+000 vertex -2.772438e+000 4.890769e+000 1.747200e+001 facet normal -9.241798e-01 4.532334e-03 -3.819308e-01 vertex -1.071567e+02 9.665134e+01 5.045382e+00 facet normal -9.938924e-02 -2.691911e-03 -9.950450e-01 facet normal -0.367742 -0.111555 0.923212 vertex 1.79875 -8.81405 3.82299 facet normal 0.0892041 0.0433596 0.995069 facet normal 1.519548e-001 9.883875e-001 -0.000000e+000 vertex 4.695738e+000 5.269281e+000 9.983999e+000 vertex 5.576935e+000 -1.102081e+000 9.983999e+000 vertex -3.893586e+000 4.057701e+000 1.747200e+001 facet normal -0.678283 -0.205751 0.705407 facet normal 0.195099 -0.980784 -7.13214e-06 vertex -0.4 2.96144 10.597 vertex -0.4 3.09564 18.7502 vertex -2.92253 1.22544 18.7525 vertex -2.93351 1.2151 18.7502 facet normal 5.969159e-01 -1.922994e-03 8.023015e-01 facet normal 0.367809 0.00348095 0.929895 facet normal -1.011997e-14 5.429241e-15 -1.000000e+00 d8eca8dc7e Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane 5e32fb4fc0953f2a10f8dc9cf7a0a3653bcbf4f2 @circuitlocution.com created pull request synth_mages/MK_VCO#5 Final revision; added custom DRC as project file (pts Final revision; added custom DRC as project file (pts Final revision; added custom DRC as project file Add jlc constraints DRC; replace order number text Compare 19 commits » 14162964f9 Add circuit blocks.
- 21.7809 vertex -2.97699 3.82407 21.7653 vertex.
- -0.247461 -0.963792 0.0993425 facet normal -0.757642 0.648866 -0.0703674.
- -8.58625 -5.28808 2.58057 vertex.